The Electronics Technology Network has commisioned a set of documents for Design Engineers and others to explain the technologies and opportunities for System-in-Package technologies.
The past decade has seen the emergence of a range of system-in-package (SiP) technologies driven by the relentless demands of the portable and consumer electronics industry for ever-greater product functionality and for improved performance at ever-reducing costs.
System-in-Package technologies provide a system or sub-system level of functionality within a single package outline. SiP combines single die or multiple, mixed technology die with passive and other supporting components. The ability to integrate devices and to mix technologies within a standard package footprint can lead to smaller footprints than standard SMT implementations, and to improved performance, lower NREs and reduced New Product Introduction (NPI) cycle times when compared with the System-on-Chip option and to reduced product function level costs savings.
The principal categories of SiP technologies include planar and stacked die SiPs, in 2D and 3D configurations that employ wire bond, flip chip, and solder ball and Through-Silicon-Via (TSV) interconnection structures. A range of SiP packaging platforms are employed that include leadframe, LTCC, laminate and thin film substrate options, the latter three categories being with or without integrated passive components.
One of the key barriers to the further take-up of SiP technologies has been the availability of design tools and robust design routes to ensure right-first-time design and minimal NPI cycle times. The latter is of particular relevance when integrated passives components are included since design iteration cycle times tend to be greater than for SMT passives. Design-for-Test, for Reliability, Thermal design and a number of other design dimensions are also of particular relevance for SiP design.
The provision of this SiP technology overview, design routes, applications and design guidance for the UK Design Community is intended to play to a key UK strength and to assist in the capture of significant added value for this industry sector.
The objectives of this SiP Design Guide for Electronics Engineers Project were as follows:
- To introduce the range of SiP technologies in current application.
- To review the benefits of SiP technology.
- To provide examples of SiP applications.
- To set out the available design routes, design tools for SiP.
- To provide initial guidance for UK engineers wishing to embark on SiP design.
- To outline future trends in SiP technology and applications.
The work was undertaken by domain expert Dr David Pedder of TWI.
The output from the project was delivered as three reports and three seminars.
These can be accessed either from the Document Library or via the links below: